How to implement a Multi Port memory on FPGA
Sometimes you need to perform a multiple data read from RAM in the same clock cycle. In this post, you will find the VHDL code implementing a Multi-Port RAM
How to Realize a FIR Test Bench in FPGA
Build an FIR test bench on FPGA in VHDL with a data generator, output buffer, and interactive simulation of impulse and step response.
Compute exp(x) in FPGA using VHDL
Learn how to implement the exponential function exp(x) in FPGA using VHDL with a LUT-based approach. Includes fixed-point quantization, Matlab code, and complete VHDL example.
Implement Digital ASK Modulator in VHDL
Learn how ASK modulation works and implement a digital ASK modulator in VHDL for FPGA. Complete code for mapper, up-converter, and layout on Cyclone III.
How to Implement a sinusoidal DDS in VHDL
Generate a sinusoidal signal in FPGA with this VHDL DDS implementation featuring NCO and look-up table for phase-to-amplitude conversion.
How to Implement NCO in VHDL
Learn how to implement a Numerically Controlled Oscillator (NCO) in VHDL for FPGA. Complete guide with accumulator theory, fixed-point math, and synthesizable RTL code.
How to Implement a Pipeline Multiplier in VHDL
Learn how to implement a pipelined multiplier in VHDL. Covers signed multiplication, partial product decomposition, and pipeline architecture for FPGAs.
How to compute the frequency of a clock
Learn how to compute the frequency of a clock in FPGA using VHDL. Step-by-step guide with code, CDC synchronization, and an interactive simulator.
How to design a good Edge Detector
Learn how to design a reliable edge detector in VHDL, avoid common mistakes like the asynchronous trap, and handle metastability with a 2-register synchronizer.