Compute exp(x) in FPGA using VHDL
Learn how to implement the exponential function exp(x) in FPGA using VHDL with a LUT-based approach. Includes fixed-point quantization, Matlab code, and complete VHDL example.
Learn how to implement the exponential function exp(x) in FPGA using VHDL with a LUT-based approach. Includes fixed-point quantization, Matlab code, and complete VHDL example.
Learn how ASK modulation works and implement a digital ASK modulator in VHDL for FPGA. Complete code for mapper, up-converter, and layout on Cyclone III.
Generate a sinusoidal signal in FPGA with this VHDL DDS implementation featuring NCO and look-up table for phase-to-amplitude conversion.
Learn how to implement a Numerically Controlled Oscillator (NCO) in VHDL for FPGA. Complete guide with accumulator theory, fixed-point math, and synthesizable RTL code.
Learn how to implement a pipelined multiplier in VHDL. Covers signed multiplication, partial product decomposition, and pipeline architecture for FPGAs.
Learn how to generate sine wave samples for a Look-Up Table (LUT) in VHDL. Covers quantization, VHDL testbench code, and ROM implementation.
Learn how to implement a 4-tap FIR filter in VHDL with fully pipelined architecture, 8-bit signed inputs and coefficients.