Comments on: How to Implement NCO in VHDL https://surf-vhdl.com/how-to-implement-nco-vhdl/ The Easiest Way To Learn VHDL Mon, 10 Jun 2019 18:59:08 +0000 hourly 1 https://wordpress.org/?v=6.5.2 By: Adama https://surf-vhdl.com/how-to-implement-nco-vhdl/#comment-10650 Mon, 10 Jun 2019 18:59:08 +0000 http://surf-vhdl.com/?p=1274#comment-10650 Hello here,
I think everyone is going fine.

I have used this code , it can generate the sample of sine wave , but I can not view my simulation wave sine like this poster.

Maybe I have not used the same software for my simulation (because me I am using Isim from Xilinx ISE 14.7)

And I have learned a lof of thing to understanding this program, thank for all !!

]]> By: unknown https://surf-vhdl.com/how-to-implement-nco-vhdl/#comment-10649 Wed, 05 Jun 2019 15:10:02 +0000 http://surf-vhdl.com/?p=1274#comment-10649 In reply to Surf-VHDL.

Hi, Thank you for the useful material. I have joined your telegram channel but I have not found the test bench for NCO there.

]]> By: Surf-VHDL https://surf-vhdl.com/how-to-implement-nco-vhdl/#comment-10575 Fri, 22 Mar 2019 21:51:03 +0000 http://surf-vhdl.com/?p=1274#comment-10575 In reply to mohaamd alahyary.

Thank you!

]]> By: mohaamd alahyary https://surf-vhdl.com/how-to-implement-nco-vhdl/#comment-10571 Mon, 18 Mar 2019 19:13:19 +0000 http://surf-vhdl.com/?p=1274#comment-10571 That great ,nice

]]> By: Surf-VHDL https://surf-vhdl.com/how-to-implement-nco-vhdl/#comment-1654 Thu, 18 May 2017 19:43:22 +0000 http://surf-vhdl.com/?p=1274#comment-1654 In reply to Anonymous.

Hi, thank you for your feedback.
Join-us signing up and you will be updated with the VHLD of NCO and more
Cheers!

]]> By: Anonymous https://surf-vhdl.com/how-to-implement-nco-vhdl/#comment-1646 Wed, 17 May 2017 21:48:27 +0000 http://surf-vhdl.com/?p=1274#comment-1646 Hi,
First off, this is very interesting post to explain the basic.
It’s appreciated!

Secondly, any chance you could post your test bench for this code, the one I write is giving me different results and I cannot see why.

Thanks and keep up the good work!

]]> By: Omar https://surf-vhdl.com/how-to-implement-nco-vhdl/#comment-1234 Mon, 13 Feb 2017 20:19:50 +0000 http://surf-vhdl.com/?p=1274#comment-1234 Sorry, I meant the way it is currently written the accumulator will periodically cycle like this:

0,4,8,12,0,4,8,…

NOT 0,4,8,12,1,5,… etc

]]> By: Omar https://surf-vhdl.com/how-to-implement-nco-vhdl/#comment-1233 Mon, 13 Feb 2017 20:10:39 +0000 http://surf-vhdl.com/?p=1274#comment-1233 The NCO code does not show how the “wrap around” operation happens to generate the sequence
0,4,8,12,1,5,9,…

The way I see it, it will produce 0,4,8,12,9,4,… etc

Am I missing something here?

]]> By: Surf-VHDL https://surf-vhdl.com/how-to-implement-nco-vhdl/#comment-1210 Thu, 09 Feb 2017 21:35:26 +0000 http://surf-vhdl.com/?p=1274#comment-1210 In reply to Robert.

Thank You! 🙂

]]> By: Steve Hoover https://surf-vhdl.com/how-to-implement-nco-vhdl/#comment-1197 Wed, 08 Feb 2017 15:36:13 +0000 http://surf-vhdl.com/?p=1274#comment-1197 An equivalent version you can play with in TL-Verilog: http://makerchip.com/sandbox/0YEfLfv/0Y6hLB
Essentially it’s this one-liner:
$Nco[7:0] <= $reset ? $start_phase[7:0] : $Nco + $fcw[7:0];

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