Comments on: VHDL CASE statement https://surf-vhdl.com/vhdl-case-statement/ The Easiest Way To Learn VHDL Sun, 11 Oct 2020 20:05:08 +0000 hourly 1 https://wordpress.org/?v=6.5.2 By: Surf-VHDL https://surf-vhdl.com/vhdl-case-statement/#comment-13205 Sun, 11 Oct 2020 20:05:08 +0000 http://surf-vhdl.com/?p=1546#comment-13205 In reply to Ronald Lopez.

Hi Ronald, thank you for your comment!

]]> By: Ronald Lopez https://surf-vhdl.com/vhdl-case-statement/#comment-12975 Wed, 23 Sep 2020 22:30:07 +0000 http://surf-vhdl.com/?p=1546#comment-12975 Good afternoon:
It is a very interesting paper, but The example commented corresponds to a Combinational logic, but you only analyzed two examples using the process command (sequential). So, I added another example using with-select-when command:

architecture rtl of mux4_case is
begin
with s select
m <=a when "00",
b when "01",
b when "10",
d when others;
end rtl;

I tried the three options in VIVADO and got the same implemented results but with LUT's, (different to the ones shown in your article), anyway confirming your statement.

Regards

]]> By: Surf-VHDL https://surf-vhdl.com/vhdl-case-statement/#comment-10563 Thu, 07 Mar 2019 20:48:18 +0000 http://surf-vhdl.com/?p=1546#comment-10563 In reply to mohaamd alahyary.

Thank you for your feedback!
I really appreciate it!

]]> By: mohaamd alahyary https://surf-vhdl.com/vhdl-case-statement/#comment-10560 Tue, 05 Mar 2019 13:58:40 +0000 http://surf-vhdl.com/?p=1546#comment-10560 Thank you for your wonderful education.

]]> By: Surf-VHDL https://surf-vhdl.com/vhdl-case-statement/#comment-10491 Tue, 25 Dec 2018 09:39:04 +0000 http://surf-vhdl.com/?p=1546#comment-10491 In reply to Roberto.

Thank you for your feedback!
ciao

]]> By: Roberto https://surf-vhdl.com/vhdl-case-statement/#comment-10490 Mon, 24 Dec 2018 01:02:56 +0000 http://surf-vhdl.com/?p=1546#comment-10490 Thank you for your amazing lessons !

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